__lasx_insert_128_hi_s

LASX intrinsic · group: Misc

Synopsis

__m256 __lasx_insert_128_hi_s (__m256 a, __m128 b)
#include <lsxintrin.h>
#include <lasxintrin.h>
CPU Flags: LASX

Description

Replace the high 128-bit half of a with the single precision vector b.

This helper intrinsic does not name a distinct LASX instruction. Depending on the operation and optimization, it may lower to a no-op, a register move, or an existing LASX permutation instruction such as xvpermi.q.

Operation

for (int i = 0;i < 4;i++) {
  dst.fp32[i] = a.fp32[i];
  dst.fp32[i + 4] = b.fp32[i];
}

GCC Compatibility

Supported by GCC 16 and later.

GCC 14 and GCC 15 do not provide this intrinsic. The fallback below uses a non-volatile GNU inline assembly register alias where the older compiler has no 128/256-bit cast operator, and otherwise uses regular LASX intrinsics. It is intended for source compatibility; the native GCC 16 intrinsic may still generate better code.

#if defined(__loongarch_asx) && !defined(__loongarch_asx_sx_conv)
static inline __m256 __lasx_insert_128_hi_s (__m256 a, __m128 b) {
  __m256 bb;
  __asm__("" : "=f"(bb) : "0"(b));
  return (__m256)__lasx_xvpermi_q((__m256i)a, (__m256i)bb, 0x02);
}
#endif

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