__lasx_xvmaddwev_q_d

LASX intrinsic · group: Integer Computation

Synopsis

__m256i __lasx_xvmaddwev_q_d (__m256i a, __m256i b, __m256i c)
#include <lasxintrin.h>
Instruction: xvmaddwev.q.d xr, xr, xr
CPU Flags: LASX

Description

Multiply the even-positioned signed 64-bit elements in b and the corresponding signed 64-bit elements in c, extending both to 128-bit, and add the product to the 128-bit elements in a.

Operation

for (int i = 0; i < 2; i++) {
  dst.qword[i] =
      (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
}

// Expands to:

if (0) {
  dst.qword[0] = (((s128)((s64)b.dword[0])) * ((s128)((s64)c.dword[0]))) +
                 ((s128)a.qword[0]);
  dst.qword[1] = (((s128)((s64)b.dword[2])) * ((s128)((s64)c.dword[2]))) +
                 ((s128)a.qword[1]);
}

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 7 1.14
3A6000 LA664 7 1.14
3C6000 LA664 7 1.14

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