__lasx_xvmulwod_d_w

LASX intrinsic · group: Integer Computation

Synopsis

__m256i __lasx_xvmulwod_d_w (__m256i a, __m256i b)
#include <lasxintrin.h>
Instruction: xvmulwod.d.w xr, xr, xr
CPU Flags: LASX

Description

Multiply the odd-positioned signed 32-bit elements in a and the corresponding signed 32-bit elements in b, extending both to 64-bit, and save the 64-bit result in dst.

Operation

for (int i = 0; i < 4; i++) {
  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] * (s64)(s32)b.word[2 * i + 1];
}

// Expands to:

if (0) {
  dst.dword[0] = ((s64)((s32)a.word[1])) * ((s64)((s32)b.word[1]));
  dst.dword[1] = ((s64)((s32)a.word[3])) * ((s64)((s32)b.word[3]));
  dst.dword[2] = ((s64)((s32)a.word[5])) * ((s64)((s32)b.word[5]));
  dst.dword[3] = ((s64)((s32)a.word[7])) * ((s64)((s32)b.word[7]));
}

Tested on real machine.

Latency and Throughput

CPU	µarch	Latency	Throughput (IPC)
3C5000	LA464	4	2
3A6000	LA664	4	2
3C6000	LA664	4	2

---

All intrinsics in alphabetical order