__lasx_xvpickve2gr_wu
LASX intrinsic · group: Misc
Synopsis
unsigned int __lasx_xvpickve2gr_wu (__m256i a, imm0_7 idx)
#include <lasxintrin.h>
Instruction: xvpickve2gr.wu r, xr, imm
CPU Flags: LASX
Description
Pick the 32-bit element at lane idx from a, zero-extend it to the GPR width, and store it in dst.
Operation
dst = (u32)a.word[idx];
Tested on real machine.
Latency and Throughput
| CPU | µarch | Latency | Throughput (IPC) |
|---|---|---|---|
| 3C5000 | LA464 | 1 | 1 |
| 3A6000 | LA664 | 1 | 1 |
| 3C6000 | LA664 | 1 | 1 |