__lasx_xvreplve0_d

LASX intrinsic · group: Misc

Synopsis

__m256i __lasx_xvreplve0_d (__m256i a)
#include <lasxintrin.h>
Instruction: xvreplve0.d xr, xr
CPU Flags: LASX

Description

Repeat the first 64-bit lane from a to all lanes of dst.

Operation

for (int i = 0; i < 4; i++) {
  dst.dword[i] = a.dword[0];
}

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 3 2
3A6000 LA664 3 4
3C6000 LA664 3 4

All intrinsics in alphabetical order