__lasx_xvsrlni_d_q

LASX intrinsic · group: Shift

Synopsis

__m256i __lasx_xvsrlni_d_q (__m256i a, __m256i b, imm0_127 imm)
#include <lasxintrin.h>
Instruction: xvsrlni.d.q xr, xr, imm
CPU Flags: LASX

Description

Logical right shift the unsigned 128-bit elements in a and b by imm, write the 64-bit results into dst.

Operation

for (int i = 0; i < 2; i++) {
  dst.dword[i] = (i < 1) ? (u64)((u128)b.qword[i] >> imm)
                         : (u64)((u128)a.qword[i - 1] >> imm);
}
for (int i = 2; i < 4; i++) {
  dst.dword[i] = (i < 3) ? (u64)((u128)b.qword[i - 1] >> imm)
                         : (u64)((u128)a.qword[i - 2] >> imm);
}

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 3 2
3A6000 LA664 3 2
3C6000 LA664 3 2

All intrinsics in alphabetical order