__lsx_vsrln_h_w
LSX intrinsic · group: Shift
Synopsis
__m128i __lsx_vsrln_h_w (__m128i a, __m128i b)
#include <lsxintrin.h>
Instruction: vsrln.h.w vr, vr, vr
CPU Flags: LSX
Description
Logical right shift each unsigned 32-bit element in a by the corresponding element of b modulo 32, write the lower 16 bits of the shifted result into the lower half of each 128-bit lane of dst, and zero the upper half.
Operation
for (int i = 0; i < 8; i++) {
dst.half[i] = (i < 4) ? (u16)((u32)a.word[i] >> (b.word[i] & 31)) : 0;
}
Tested on real machine.
Latency and Throughput
| CPU | µarch | Latency | Throughput (IPC) |
|---|---|---|---|
| 3C5000 | LA464 | 2 | 1 |
| 3A6000 | LA664 | 2 | 2 |
| 3C6000 | LA664 | 2 | 2 |
| 2K1000LA | LA264 | 2 | 0.5(1/2) |
| 2K3000 | LA364E | 2 | 0.5(1/2) |