movscr2gr

LBT intrinsic · group: LBT State Transfer

Synopsis

Instruction: movscr2gr rd, scrj
CPU Flags: LBT

Description

Move scratch register to GPR: copy value in the scratch register selected by scrj (0-3) to rd.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 N/A 2
3C6000 LA664 N/A 1

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