x86dec.b

LBT intrinsic · group: x86 Integer

Synopsis

Instruction: x86dec.b rj
CPU Flags: LBT

Description

x86-style decrement: subtract 1 from the 8-bit value in rj. Update EFLAGS (AF, OF, PF, ZF, SF). Preserve CF. Only EFLAGS (LBT4) is updated; the GPR is not modified.

Operation

uint8_t v = (uint8_t)a;
uint8_t r = v - 1;
// CF preserved from input EFLAGS.CF
EFLAGS.PF = parity_even((uint8_t)r);
EFLAGS.AF = ((v ^ 1 ^ r) & 0x10) != 0;
EFLAGS.ZF = r == 0;
EFLAGS.SF = (int8_t)r < 0;
EFLAGS.OF = v == (uint8_t)INT8_MIN;

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 2 0.5(1/2)
3C6000 LA664 2 0.5(1/2)

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