x86rcli.b

LBT intrinsic · group: x86 Shift

Synopsis

Instruction: x86rcli.b rj, imm
CPU Flags: LBT

Description

x86-style rotate left through carry: rotate 8-bit value in rj and CF together as a 9-bit ring left by immediate imm. Update CF, OF (for shift count of 1). Only EFLAGS (LBT4) is updated; the GPR is not modified.

Operation

uint8_t v = (uint8_t)a;
unsigned c = (unsigned)(imm & 0x1f);
unsigned n = c % 9;
if (n != 0) {
  unsigned carry_out = ((v >> (8 - n)) & 1);
  EFLAGS.CF = carry_out;
  if (c == 1) {
    uint8_t r = (uint8_t)(v << 1);
    EFLAGS.OF = ((r & 0x80) != 0) != carry_out;
  }
}

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 2 0.5(1/2)
3C6000 LA664 2 0.5(1/2)

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