x86rcr.h

LBT intrinsic · group: x86 Shift

Synopsis

Instruction: x86rcr.h rj, rk
CPU Flags: LBT

Description

x86-style rotate right through carry: rotate 16-bit value in rj and CF together as a 17-bit ring right by the amount specified in rk. Update CF, OF (for shift count of 1). Only EFLAGS (LBT4) is updated; the GPR is not modified.

Operation

uint16_t v = (uint16_t)a;
unsigned c = (unsigned)(b & 0x1f);
unsigned n = c % 17;
if (n != 0) {
  unsigned carry_in = EFLAGS.CF;
  unsigned carry_out = ((v >> ((n - 1) % (16 + 1))) & 1);
  EFLAGS.CF = carry_out;
  if (c == 1) {
    uint16_t r = (uint16_t)((v >> 1) | (carry_in << 15));
    EFLAGS.OF = (((r >> 15) ^ (r >> 14)) & 1) != 0;
  }
}

Tested on real machine.

Latency and Throughput

CPU µarch Latency Throughput (IPC)
3C5000 LA464 2 0.5(1/2)
3C6000 LA664 2 0.5(1/2)

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